Class AB output stage circuit with stable quiescent current

ABSTRACT

A class-AB output stage circuit is configured with controllable reference voltages for providing stable quiescent current. An exemplary output stage circuit comprises one or more control circuits, such as feedback loops, configured to control and/or adjust the reference voltages within the class-AB circuit based on the output voltage and/or supply rail voltage levels. In addition, an exemplary output stage circuit can also comprise one or more clamp circuits configured to facilitate operation of the output stage circuit when the output supply is proximate to or exceeds a positive or a negative supply rail.

FIELD OF INVENTION

The present invention relates to operational amplifiers. Moreparticularly, the present invention relates to a Class AB output stagecircuit with stable quiescent current as may be used within operationalamplifiers.

BACKGROUND OF THE INVENTION

The demand for improved operational amplifiers, and in particular lowvoltage, high-speed operational amplifier circuits continues toincrease. Such operational amplifier circuits generally include an inputstage circuit and an output stage circuit comprised of various amplifierdevices and other current sources.

Output stage circuits are generally configured to provide a particularload impedance with a desired output voltage V_(OUT) and currentI_(OUT). The typical main objectives of output stage circuits are toprovide negative and positive output currents at high currentefficiency, an output voltage range that efficiently uses the fullrail-to-rail range, i.e., from the negative supply rail to the positivesupply rail, low distortion, and good high-frequency performance.Class-AB biasing is often used to improve performance of output stagecircuits due to the ability to eliminate crossover distortion by biasingthe output transistors at a small, but finite, current.

With reference to FIG. 1, a conventional class-AB output stage circuit100 comprises a pair of gate bias voltage circuits 102 and 104 and aclass-AB biasing circuit 106 for driving an output buffer 108 comprisingoutput transistors OUT₁ and OUT₂. Gate bias voltage circuit 102comprises a pair of diode-connected transistors M₁ and M₂ coupled to anupper-supply rail V_(DD) and configured with a current source I₃ togenerate a voltage reference V_(REF1), and gate bias voltage circuit 104comprises a pair of diode-connected transistors M₃ and M₄ coupled to alower-supply rail V_(SS) and configured with a current source I₄ togenerate a voltage reference V_(REF2). Class-AB biasing circuit 106comprises transistors M₅ and M₆ configured with current sources I₁ andI₂ to drive output transistors OUT₁ and OUT₂, respectively. Gate biasreference voltages V_(REF1) and V_(REF2) drive gates of transistors M₅and M₆, respectively. The overall speed of output stage circuit 100 islimited by the size of output transistors OUT₁ and OUT₂; thus, outputtransistors OUT₁ and OUT₂ need to be as short as possible, i.e., haveshort channel lengths, to improve the overall speed and/or capacitiveload handling capability.

During operation of output stage circuit 100, as output transistor OUT₁attempts to shut down, and as the gate voltage of transistor M₅approaches voltage reference V_(REF1), transistor M₅ will begin toconduct current, i.e., as the gate of transistor M₅ becomes biased,current will begin to flow through transistor M₅. However, when suchcurrent flows through transistor M₅, output transistor OUT₁ is preventedfrom completely shutting down. It is also critical for the varioustransistors to be suitably matched to facilitate a stable quiescentcurrent, e.g., transistor M₁ has to match transistor OUT₁ and transistorM₂ has to match M₅ for the PMOS-side of output stage circuit 100, andtransistor M₄ has to match transistor OUT₂ and transistor M₃ has tomatch M₆ for the NMOS-side of output stage circuit 100.

The need for matching arises partly in that the gate-source voltage oftransistor M₅ plus the gate-source voltage of output transistor OUT₁equals the gate-source voltage of transistor M₁ plus the gate-sourcevoltage of transistor M₂; however, while the operation of transistors M₁and M₂ is a function of constant current source I₃, and the operation oftransistor OUT₁ is a function of its drain-source voltage and I_(q)(both which vary during operation), the operation of transistor M₅ isnot a function of output voltage supply. For example, with additionalreference to FIG. 2, curves representing drain currents I_(D) of outputtransistors OUT₁ and/or OUT₂ versus output voltage V_(OUT) areillustrated. As can be realized, as output voltage V_(OUT) increases,quiescent current I_(q) changes at an even higher rate, instead ofremaining within a desired stable region 202.

Accordingly, a real concern with output stage circuit 100 is thatreference voltages V_(REF1) and V_(REF2), which dictate operation oftransistor M₅ within class-AB circuit 106, do not depend on outputvoltage V_(OUT) or supply rails V_(DD) and V_(SS). Further, matchingbetween transistors is affected by changes in supply rails V_(DD) andV_(SS) and output voltage V_(OUT), i.e., as supply rails V_(DD) andV_(SS) change, quiescent current I_(q) can change as well. This scenariocan significantly impact operation of output stage circuit 100 sincequiescent current I_(q) can comprise the majority of the total currentbudget. Thus, for example, in applications utilizing approximately 0.6μm processes and requiring minimum-length output transistors OUT₁ andOUT₂, the change in quiescent current I_(q) can be more than twice thevariation of supply rails V_(DD) and V_(SS), and even greater, e.g.,four times or more, for finer processes requiring even shorter channellengths for output transistors OUT₁ and OUT₂.

SUMMARY OF THE INVENTION

In accordance with various aspects of the present invention, a class-ABoutput stage circuit is configured with controllable reference voltagesfor providing stable quiescent current. Stable quiescent current canallow for a decrease in the overall current budget of an operationalamplifier circuit.

In accordance with an exemplary embodiment, an output stage circuitcomprises one or more control circuits, such as feedback loops,configured to control and/or adjust the reference voltages within theclass-AB circuit based on the output voltage and/or supply rail voltagelevels. For example, an exemplary feedback loop can be configured withina PMOS-side and/or NMOS-side of an output stage circuit. In accordancewith an exemplary embodiment, the exemplary control circuits cancomprise a feedback element coupled to output devices to generateoutput-dependent reference voltages. In addition, an exemplary controlcircuit can also be coupled to one or more supply rails to provide asupply rail-dependent reference voltage.

In accordance with another exemplary embodiment, an exemplary outputstage circuit can comprise one or more clamp circuits configured tofacilitate operation of the output stage circuit when the output supplyis proximate to or exceeds a positive or a negative supply rail. Forexample, an exemplary clamp circuit can be configured to enableoperation of an exemplary control circuit when the output supply iswithin the supply rail voltages, and to prevent current saturation whenthe output supply reaches or exceeds the supply rail voltages anddisables the exemplary feedback loop.

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present invention may be derived byreferring to the detailed description and claims when considered inconnection with the Figures, where like reference numbers refer tosimilar elements throughout the Figures, and:

FIG. 1 illustrates a schematic diagram of a prior art output stagecircuit;

FIG. 2 illustrates an output supply diagram from a prior art outputstage circuit;

FIG. 3 illustrates a schematic diagram of an exemplary PMOS-side of anoutput stage circuit in accordance with an exemplary embodiment of thepresent invention;

FIG. 4 illustrates a schematic diagram of an exemplary PMOS-side of anoutput stage circuit in accordance with another exemplary embodiment ofthe present invention; and

FIG. 5 illustrates a schematic diagram of another exemplary output stagecircuit in accordance with an exemplary embodiment of the presentinvention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS OF THE INVENTION

The present invention may be described herein in terms of variousfunctional components. It should be appreciated that such functionalcomponents may be realized by any number of hardware componentsconfigured to perform the specified functions. For example, the presentinvention may employ various integrated components, such as buffers,current mirrors, and logic devices comprised of various electricaldevices, e.g., resistors, transistors, capacitors, diodes and the like,whose values may be suitably configured for various intended purposes.In addition, the present invention may be practiced in any integratedcircuit application. However for purposes of illustration only,exemplary embodiments of the present invention will be described hereinin connection with an output stage circuit as may be used in anoperational amplifier. Further, it should be noted that while variouscomponents may be suitably coupled or connected to other componentswithin exemplary circuits, such connections and couplings can berealized by direct connection between components, or by connectionthrough other components and devices located thereinbetween.

In accordance with various aspects of the present invention, a class-ABoutput stage circuit is configured with controllable reference voltagesfor providing stable quiescent current. An exemplary output stagecircuit can be configured with various types of input stage circuitswithin various configurations of operational amplifier circuits.Providing for a stable quiescent current can allow for a decrease in theoverall current budget of an operational amplifier circuit.

In accordance with an exemplary embodiment, an output stage circuitcomprises one or more control circuits, for example feedback loops,configured to control and/or adjust the reference voltages within theclass-AB circuit based on the output voltage and/or supply rail voltagelevels. An exemplary control circuit comprising a feedback loop can beconfigured with a PMOS-side and/or NMOS-side of an output stage circuit.For example, with reference to an exemplary embodiment illustrated inFIG. 3, a PMOS-circuit 300 for an output stage circuit comprises afeedback loop 302 and an output device OUT₁. A class-AB circuit 306 isconfigured within feedback loop 302 and comprises a transistor device M₅configured to drive output device OUT₁, and can be configured in variousmanners with one or more additional components for class-AB biasing.Output device OUT₁ can comprise various output buffer configurations foran output stage circuit. Output device OUT₁ can also comprise any lengthdevice; however, in accordance with an exemplary embodiment, outputdevice OUT₁ comprises a minimum-length device to further facilitatehigher speed and/or capacitive load handling capability.

In accordance with an exemplary embodiment, an exemplary feedback loop302 can comprise at least one feedback element 310 coupled to outputdevice OUT₁ to generate an output-dependent reference voltage V_(REF1).In the exemplary embodiment, feedback element 310 comprises a transistorM₇ having a control (gate) terminal coupled to an output (drain)terminal of output device OUT₁, i.e., coupled to output voltage V_(OUT),to provide feedback from the output supply. In addition, an exemplaryfeedback loop 302 can also be coupled to one or more supply rails toprovide a supply rail-dependent reference voltage. For example, feedbackloop 302 of PMOS-circuit 300 can further comprise a transistor M₁ and atransistor M₂ configured with a current source I₁ to facilitategeneration of a voltage reference V_(REF1). Transistor M₁ comprises aninput (source) terminal coupled to an upper-supply rail V_(DD), acontrol (gate) terminal coupled to current source I₁, and an output(drain) terminal coupled to an input (source) terminal of feedbackelement M₇, while diode-connected transistor M₂ comprises an input(source) terminal coupled to a current source I₁ and an output (drain)terminal and a control (gate) terminal configured to facilitategeneration of output-dependent voltage reference V_(REF1).

Feedback loop 302 is configured to facilitate matching of the output(drain) voltages of transistor M₁ and output device OUT₁. For example,reference voltage V_(REF1) is generated from gate-source voltages oftransistors M₁ and M₂. In other words:V _(REF1) =V _(GSM1) +V _(GSM2)

While the gate-source voltage V_(GSM2) of transistor M₂ is a function ofconstant current source I₁, through feedback coupling of transistor M₇,the gate-source voltage V_(GSM1) of transistor M₁ is a function ofoutput voltage V_(OUT), i.e., a function of the output (drain) voltageof output device OUT₁, as well as upper supply rail V_(DD). Accordingly,variances in the output voltage and/or supply rail voltage levels willaffect the gate-source voltage V_(GSM1) of transistor M₁, thus suitablyadjusting and/or controlling reference voltage V_(REF1). As a result,suitable matching of output (drain) voltages of transistor M₁ and outputdevice OUT₁ can be provided to suitably control and/or adjust tofacilitate stability of quiescent current I_(q).

While a PMOS-circuit 300 is illustrated, an exemplary output stagecircuit can comprise an NMOS-circuit for operation of supply voltagewhen approaching negative supply rail V_(SS), with another exemplaryfeedback loop comprising at least one feedback element coupled to anoutput device OUT₂ to generate an output-dependent reference voltageV_(REF2). In addition to feedback element M₇, transistor M₁ andtransistor M₂, feedback loop 302 can comprise other components anddevices to facilitate control and/or adjustment of reference voltageV_(REF1).

In accordance with another exemplary embodiment, an exemplary outputstage circuit can comprise one or more clamp circuits configured tofacilitate operation of the output stage circuit when the output supplyis proximate to or exceeds a positive or a negative supply rail. Forexample, an exemplary clamp circuit can be configured to enableoperation of an exemplary feedback loop when the output supply is withinthe supply rail voltages, and to prevent current saturation when theoutput supply reaches or exceeds the supply rail voltages and disablesthe exemplary feedback loop.

With reference to FIG. 4, in accordance with an exemplary embodiment, aPMOS-side circuit 400 comprises a feedback loop 402 with at least onefeedback-element 410 and a class-AB device M₅, an output device OUT₁,and a clamp circuit 412. In accordance with this exemplary embodiment,feedback loop 402 further comprises a diode-device 414 configuredbetween the output (drain) terminal of transistor M₁ and input (source)terminal of feedback element M₇. Diode-device 414 can be configured invarious manners and comprise various diode-configurations and diodedevices. In the exemplary embodiment, diode-device 414 comprisesdiode-connected transistor M₈.

Clamp circuit 412 suitably comprises a transistor device M₉ configuredin a parallel arrangement with feedback element M₇. Transistor M₉ has acontrol (gate) terminal coupled to lower supply rail V_(SS) through avoltage source V₁, with an input (source) terminal and an output (drain)terminal coupled to the input (source) terminal and an output (drain)terminal of feedback element M₇, respectively.

During operation, when the output (drain) voltage of output device OUT₁is proximate to or exceeds negative rail V_(SS), for example byapproximately one gate-source voltage (1 V_(GS)) above or below negativerail V_(SS), and feedback element M₇ is not biased, feedback loop 402 isdisabled. However, clamp circuit 412 operates to bypass feedback loop402 to prevent current saturation of current source I₂. In other words,as the output (drain) voltage of output device OUT₁ is proximate to oris below negative rail V_(SS), clamp circuit 412 provides an additionalvoltage source that facilitates operation safely without currentsaturation.

While clamp circuit 412 comprises transistor device M₉ in accordancewith an exemplary embodiment, clamp circuit 412 can comprise any otherclamp circuit configuration or other circuit configured to provideanother voltage source, e.g., a voltage source greater than at least onegate-source voltage (1 V_(GS)) above feedback element M₇, when theoutput supply reaches or exceeds the supply rail voltages and disablesexemplary feedback loop 402.

In addition, while PMOS-circuits have been illustrated for simplicitypurposes, an exemplary output stage circuit can suitably comprise bothPMOS and NMOS-circuit configurations. For example, with reference toFIG. 5, in accordance with an exemplary embodiment, an exemplary outputstage circuit 500 suitably comprises a class-AB circuit comprisingtransistors M₅ and M₆, a pair of feedback loops, e.g., a first feedbackloop comprising transistor M₁, diode-device M₈, feedback element M₇ andtransistor M₂, and a second feedback loop comprising transistor M₄,diode-device M₁₂, feedback element M₁₁ and transistor M₃, and a pair ofclamp circuits comprising transistor M₉ and transistor M₁₃. Further,while exemplary output stage circuit 500 illustrates a pair of clampcircuits and diode-devices within both a PMOS-circuit and NMOS-circuit,output stage circuit 500 can be provided with only a single clampcircuit and diode-device within one of a PMOS-circuit and NMOS-circuit,with the other PMOS-circuit or NMOS-circuit without any clamp circuitsor diode-devices.

The present invention has been described above with reference to variousexemplary embodiments. However, those skilled in the art will recognizethat changes and modifications may be made to the exemplary embodimentswithout departing from the scope of the present invention. For example,the various components may be implemented in alternate ways, such as,for example, by implementing bipolar or JFET devices for the variousdevices. In addition, one or more additional stages may be included atthe input or output stages in accordance with various exemplaryembodiments. Further, the various exemplary embodiments can beimplemented with other types of operational amplifier circuits inaddition to the circuits illustrated above. These alternatives can besuitably selected depending upon the particular application or inconsideration of any number of factors associated with the operation ofthe system. Moreover, these and other changes or modifications areintended to be included within the scope of the present invention, asexpressed in the following claims.

1. An output stage circuit configured to provide stable quiescentcurrent, said output stage circuit comprising: a class-AB device; anoutput device configured for providing an output voltage, said outputdevice coupled to said class-AB device; and a feedback loop configuredfor controlling a reference voltage for said class-AB device.
 2. Theoutput stage circuit according to claim 1, wherein said feedback loop isconfigured for controlling said reference voltage based on said outputvoltage.
 3. The output stage circuit according to claim 1, wherein saidfeedback loop comprises: a feedback element having a control terminalcoupled to an output terminal of said output device.
 4. The output stagecircuit according to claim 3, wherein said feedback loop furthercomprises a first transistor device and a second transistor device, saidfirst transistor device having an output terminal coupled to an inputterminal of said feedback element and a control terminal coupled to aninput terminal of said second transistor device, said second transistordevice having a control terminal and an output terminal coupled to acontrol terminal of said class-AB device.
 5. The output stage circuitaccording to claim 4, wherein said output terminal of said firsttransistor device is coupled through a diode-device to said inputterminal of said feedback element.
 6. The output stage circuit accordingto claim 3, wherein said feedback element comprises an output terminalcoupled to a control terminal of said class-AB device.
 7. The outputstage circuit according to claim 1, wherein said output stage circuitfurther comprises a clamp circuit configured to facilitate operation ofsaid output stage circuit when said output voltage is proximate to asupply rail voltage.
 8. The output stage circuit according to claim 7,wherein said clamp circuit is configured in parallel with a feedbackelement of said feedback loop.
 9. The output stage circuit according toclaim 8, wherein said clamp circuit comprises a transistor device havinga control terminal coupled to a voltage source, an input terminalcoupled to an input terminal of said feedback element, and an outputterminal coupled to an output terminal of said feedback element.
 10. Theoutput stage circuit according to claim 1, wherein said class-AB device,said output device and said feedback loop are configured for control ofa PMOS-side circuit, and said output stage further comprises anNMOS-side circuit comprising: a second class-AB device; a second outputdevice configured for providing said output voltage, said second outputdevice coupled to said second class-AB device; and a second feedbackloop configured for controlling a second reference voltage for saidsecond class-AB device.
 11. The output stage circuit according to claim1, wherein said output device comprises a minimum-length device tofacilitate at least one of higher speed and capacitive load handlingcapability.
 12. An operational amplifier circuit comprising an inputstage circuit and an output stage circuit configured to provide stablequiescent current, said output stage circuit comprising: an outputdevice configured for providing an output voltage; a class-AB deviceconfigured to control said output device; and a control circuitconfigured for controlling a reference voltage for said class-AB devicebased on said output voltage.
 13. The operational amplifier circuitaccording to claim 12, wherein said control circuit comprises a feedbackelement having a control terminal coupled to an output terminal of saidoutput device.
 14. The operational amplifier circuit according to claim13, wherein said control circuit further comprises a first transistordevice and a second transistor device, said first transistor devicehaving an output terminal coupled to an input terminal of said feedbackelement and a control terminal coupled to an input terminal of saidsecond transistor device, said second transistor device having a controlterminal and an output terminal coupled to a control terminal of saidclass-AB device.
 15. The operational amplifier circuit according toclaim 13, wherein said input terminal of said second transistor deviceis coupled to a current source.
 16. The operational amplifier circuitaccording to claim 13, wherein said feedback element comprises an outputterminal coupled to a control terminal of said class-AB device.
 17. Theoperational amplifier circuit according to claim 12, wherein said outputstage circuit further comprises a clamp circuit configured to facilitateoperation of said output stage circuit when said output voltage iseither proximate to or exceeds a supply rail voltage.
 18. Theoperational amplifier circuit according to claim 17, wherein said clampcircuit is configured in parallel with a feedback element of saidcontrol circuit.
 19. The operational amplifier circuit according toclaim 17, wherein said output terminal of said first transistor deviceis coupled through a diode-device to said input terminal of saidfeedback element.
 20. The operational amplifier circuit according toclaim 17, wherein said clamp circuit comprises a transistor devicehaving a control terminal coupled to a voltage source, an input terminalcoupled to an input terminal of said feedback element, and an outputterminal coupled to an output terminal of said feedback element.
 21. Theoperational amplifier circuit according to claim 12, wherein saidclass-AB device, said output device and said control circuit areconfigured for control of a PMOS-side circuit, and said output stagefurther comprises an NMOS-side circuit comprising: a second class-ABdevice; a second output device configured for providing said outputvoltage, said second output device coupled to said second class-ABdevice; and a second control circuit configured for controlling a secondreference voltage for said second class-AB device.
 22. The output stagecircuit according to claim 12, wherein said output device comprises aminimum-length device to facilitate at least one of higher speed andcapacitive load handling capability.
 23. A method for providing stablequiescent current in an output stage of an operational amplifier, saidmethod comprising: receiving through a feedback element a feedbacksignal corresponding to an output voltage supply; generating a referencevoltage based upon said output voltage feedback signal; and controllingwith said output voltage-based reference voltage a class-AB deviceconfigured for driving an output device of said output stage.
 24. Themethod according to claim 23, wherein said generating a referencevoltage comprises providing said output voltage feedback signal within afeedback loop comprising a first transistor device and a secondtransistor device.
 25. The method according to claim 24, wherein saidmethod further comprises providing a voltage reference through aclamping circuit to said first transistor device when said outputvoltage supply is proximate to a supply rail.
 26. An output stagecircuit configured to provide stable quiescent current, said outputstage circuit comprising: a first class-AB device comprising a PMOStransistor, and a second class-AB device comprising an NMOS transistor;a first output device and a second output device having output terminalscoupled together and configured for providing an output voltage, saidfirst output device coupled to said PMOS-based class-AB device and saidsecond output device coupled to said NMOS-based class-AB device; and afirst feedback loop configured for generating a first reference voltagefor said PMOS-based class-AB device based on a level of output voltagesupply, a second feedback loop configured for controlling a secondreference voltage for said NMOS-based class-AB device based on saidlevel of output voltage supply.
 27. The output stage circuit accordingto claim 26, wherein said output stage circuit further comprises a firstclamp circuit configured to facilitate operation of said output stagecircuit when said output voltage is proximate to a lower supply railvoltage, and a second clamp circuit configured to facilitate operationof said output stage circuit when said output voltage is proximate to anupper supply rail voltage.
 28. The output stage circuit according toclaim 27, wherein said first clamp circuit is configured in parallelwith a first feedback element of said first feedback loop, and saidsecond clamp circuit is configured in parallel with a second feedbackelement of said second feedback loop.
 29. An output stage circuitconfigured to provide stable quiescent current, said output stagecircuit comprising: a pair of class-AB devices configured for control ofa pair of output devices; and; a feedback circuit configured forcontrolling a reference voltage for said pair of class-AB devices.